About

Abhishek is currently working as Senior Hardware Architect in the Architecture Group at Xilinx. From April 2017 to October 2018, he worked as a Postdoctoral Research Staff Member at the Center for Applied Scientific Computing at Lawrence Livermore National Laboratory (LLNL) under the supervision of Dr. Maya Gokhale. During his Postdoctoral assignment, he developed an enhanced version of Logic in Memory emulator (LiME) based on Zynq UltraScale+ MPSoC and used it for the evaluation of near-memory accelerators.

Abhishek earned his Ph.D. in Computer Engineering from Nanyang Technological University, Singapore under the supervision of Assoc. Prof. Douglas L. Maskell and Assoc. Prof. Suhaib A. Fahmy. During his Ph.D., he developed techniques for reducing the area and performance overheads in runtime-programmable coarse-grained dataflow overlays and for virtualizing FPGA fabric within Zynq SoC.

Prior to his Ph.D., he completed Bachelors of Technology with Honors in Electronics and Communication Engineering from Indian Institute of Information Technology, Allahabad in 2012. For his dissertation work, he worked as an intern at STMicroelectronics, India. Prior to that he was awarded MITACS Globalink Scholarship to pursue research work at Electrical and Computer Engineering Department, University of Alberta, Canada in May, 2011.

Open Source Contributions (Hardware/Software)

• Xilinx hydra: An experimental framework to explore domain-specific architectures (targetting FPGA) for sparse linear algebra applications. Currently, the repository contains tools to design and customize accelerator for sparse matrix vector multiplication (SpMV) targetting HBM-enabled FPGA platform (Alveo U280). Github Repo: https://github.com/Xilinx/hydra
• LLNL lime: Logic in Memory Emulator (LiME) is a hardware/software tool specially designed for memory system evaluation and experiment. Emerging memories display a wide range of bandwidths, latencies, and capacities, making it challenging for the computer architect to navigate the design space of potential memory configurations, and for the application developer to assess performance implications of using such memories. Github Repo: https://github.com/LLNL/lime