Abhishek Jain

Abhishek Jain

Adaptive Platform Architect at Xilinx

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portfolio

publications

Microkernel hypervisor for a hybrid ARM-FPGA platform

Published in In the proceedings of Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on, 2013

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Recommended citation: Khoa Dang, Abhishek Jain, Jin Cui, Suhaib Fahmy, Douglas Maskell, "Microkernel hypervisor for a hybrid ARM-FPGA platform." In the proceedings of Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on, 2013. (http://abhishekkumarjain.github.io/files/ASAP2013.pdf)

Efficient Overlay architecture based on DSP blocks

Published in In the proceedings of 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

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Recommended citation: Abhishek Jain, Suhaib Fahmy, Douglas Maskell, "Efficient Overlay architecture based on DSP blocks." In the proceedings of 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2015. (http://abhishekkumarjain.github.io/files/FCCM2015.pdf)

Are coarse-grained overlays ready for general purpose application acceleration on fpgas?

Published in In the proceedings of 2016 IEEE 14th Intl Conf on Dependable, Autonomic and Secure Computing, 14th Intl Conf on Pervasive Intelligence and Computing, 2nd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech), 2016

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Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Are coarse-grained overlays ready for general purpose application acceleration on fpgas?." In the proceedings of 2016 IEEE 14th Intl Conf on Dependable, Autonomic and Secure Computing, 14th Intl Conf on Pervasive Intelligence and Computing, 2nd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech), 2016. (http://abhishekkumarjain.github.io/files/PICOM2016.pdf)

DeCO: A DSP block based FPGA accelerator overlay with low overhead interconnect

Published in In the proceedings of 2016 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

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Recommended citation: Abhishek Jain, Xiangwei Li, Pranjul Singhai, Douglas Maskell, Suhaib Fahmy, "DeCO: A DSP block based FPGA accelerator overlay with low overhead interconnect." In the proceedings of 2016 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2016. (http://abhishekkumarjain.github.io/files/FCCM2016.pdf)

Microscope on memory: MPSoC-enabled computer memory system assessments

Published in In the proceedings of Field-Programmable Custom Computing Machines (FCCM), 2018 IEEE Annual International Symposium on, 2018

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Recommended citation: Abhishek Jain, Scott Lloyd, Maya Gokhale, "Microscope on memory: MPSoC-enabled computer memory system assessments." In the proceedings of Field-Programmable Custom Computing Machines (FCCM), 2018 IEEE Annual International Symposium on, 2018. (http://abhishekkumarjain.github.io/files/FCCM2018.pdf)

A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs

Published in In the proceedings of 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020

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Recommended citation: Abhishek Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde, "A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs." In the proceedings of 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020. (https://people.ece.ubc.ca/hosseino/publications/SpMV_FPL2020_published.pdf)

High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay

Published in In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020

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Recommended citation: Xiangwei Li, Kizheppatt Vipin, Douglas Maskell, Suhaib Fahmy, Abhishek Jain, "High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay." In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020. (http://wrap.warwick.ac.uk/132228/7/WRAP-high-throughput-accelerator-framework-linear-Fahmy-2020.pdf)

Role of on-chip networks in building domain-specific architectures (DSAs) for sparse computations

Published in In the proceedings of Proceedings of the Workshop on System-Level Interconnect: Problems and Pathfinding Workshop, 2020

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Recommended citation: Abhishek Jain, "Role of on-chip networks in building domain-specific architectures (DSAs) for sparse computations." In the proceedings of Proceedings of the Workshop on System-Level Interconnect: Problems and Pathfinding Workshop, 2020. (https://www.youtube.com/watch?v=CrWcchvFJVM&t=19313s)

The Evolution of Domain-Specific Computing for Deep Learning

Published in IEEE Circuits and Systems Magazine, 2021

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Recommended citation: Stephen Neuendorffer, Alireza Khodamoradi, Kristof Denolf, Abhishek Jain, Samuel Bayliss, "The Evolution of Domain-Specific Computing for Deep Learning." IEEE Circuits and Systems Magazine, 2021. (https://www.semanticscholar.org/paper/The-Evolution-of-Domain-Specific-Computing-for-Deep-Neuendorffer-Khodamoradi/4133952aaaa326147d477a003343804b62a35236)

talks

teaching

Teaching experience 1

Undergraduate course, University 1, Department, 2014

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Teaching experience 2

Workshop, University 1, Department, 2015

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