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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.
Pages
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Posts
Blog Post number 4
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Blog Post number 1
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portfolio
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publications
Microkernel hypervisor for a hybrid ARM-FPGA platform
Published in In the proceedings of Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on, 2013
Recommended citation: Khoa Dang, Abhishek Jain, Jin Cui, Suhaib Fahmy, Douglas Maskell, "Microkernel hypervisor for a hybrid ARM-FPGA platform." In the proceedings of Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on, 2013. (http://abhishekkumarjain.github.io/files/ASAP2013.pdf)
Virtualized execution and management of hardware tasks on a hybrid ARM-FPGA platform
Published in Journal of Signal Processing Systems, 2014
Recommended citation: Abhishek Jain, Khoa Pham, Jin Cui, Suhaib Fahmy, Douglas Maskell, "Virtualized execution and management of hardware tasks on a hybrid ARM-FPGA platform." Journal of Signal Processing Systems, 2014. (http://abhishekkumarjain.github.io/files/JSPS2014.pdf)
Efficient Overlay architecture based on DSP blocks
Published in In the proceedings of 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
Recommended citation: Abhishek Jain, Suhaib Fahmy, Douglas Maskell, "Efficient Overlay architecture based on DSP blocks." In the proceedings of 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2015. (http://abhishekkumarjain.github.io/files/FCCM2015.pdf)
Adapting the DySER architecture with DSP blocks as an Overlay for the Xilinx Zynq
Published in ACM SIGARCH Computer Architecture News, 2016
Recommended citation: Abhishek Jain, Xiangwei Li, Suhaib Fahmy, Douglas Maskell, "Adapting the DySER architecture with DSP blocks as an Overlay for the Xilinx Zynq." ACM SIGARCH Computer Architecture News, 2016. (http://abhishekkumarjain.github.io/files/ACMCAN2015.pdf)
An Area-Efficient FPGA Overlay using DSP Block based Time-multiplexed Functional Units
Published in arXiv preprint arXiv:1606.06460, 2016
Recommended citation: Xiangwei Li, Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "An Area-Efficient FPGA Overlay using DSP Block based Time-multiplexed Functional Units." arXiv preprint arXiv:1606.06460, 2016. (http://abhishekkumarjain.github.io/files/OLAF2016.pdf)
Are coarse-grained overlays ready for general purpose application acceleration on fpgas?
Published in In the proceedings of 2016 IEEE 14th Intl Conf on Dependable, Autonomic and Secure Computing, 14th Intl Conf on Pervasive Intelligence and Computing, 2nd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech), 2016
Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Are coarse-grained overlays ready for general purpose application acceleration on fpgas?." In the proceedings of 2016 IEEE 14th Intl Conf on Dependable, Autonomic and Secure Computing, 14th Intl Conf on Pervasive Intelligence and Computing, 2nd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech), 2016. (http://abhishekkumarjain.github.io/files/PICOM2016.pdf)
Coarse-Grained FPGA Overlays for On-demand Acceleration of Data Center Workloads
Published in International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2016
Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Coarse-Grained FPGA Overlays for On-demand Acceleration of Data Center Workloads." International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2016. (http://abhishekkumarjain.github.io/files/H2RC2016.pdf)
DeCO: A DSP block based FPGA accelerator overlay with low overhead interconnect
Published in In the proceedings of 2016 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
Recommended citation: Abhishek Jain, Xiangwei Li, Pranjul Singhai, Douglas Maskell, Suhaib Fahmy, "DeCO: A DSP block based FPGA accelerator overlay with low overhead interconnect." In the proceedings of 2016 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, 2016. (http://abhishekkumarjain.github.io/files/FCCM2016.pdf)
Throughput oriented FPGA overlays using DSP blocks
Published in In the proceedings of 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016
Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Throughput oriented FPGA overlays using DSP blocks." In the proceedings of 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016. (http://abhishekkumarjain.github.io/files/DATE2016.pdf)
LiME: An Open Source Memory System Emulation Platform
Published in Workshop on Open Source Supercomputing, 2017
Recommended citation: Abhishek Jain, Scott Lloyd, Maya Gokhale, "LiME: An Open Source Memory System Emulation Platform." Workshop on Open Source Supercomputing, 2017. (http://abhishekkumarjain.github.io/files/OPENSU2017.pdf)
Resource-Aware Just-in-Time OpenCL Compiler for Coarse-Grained FPGA Overlays
Published in arXiv preprint arXiv:1705.02730, 2017
Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Resource-Aware Just-in-Time OpenCL Compiler for Coarse-Grained FPGA Overlays." arXiv preprint arXiv:1705.02730, 2017. (http://abhishekkumarjain.github.io/files/OLAF2017.pdf)
A time-multiplexed FPGA overlay with linear interconnect
Published in In the proceedings of 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018
Recommended citation: Xiangwei Li, Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "A time-multiplexed FPGA overlay with linear interconnect." In the proceedings of 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018. (http://abhishekkumarjain.github.io/files/DATE2018.pdf)
Microscope on memory: MPSoC-enabled computer memory system assessments
Published in In the proceedings of Field-Programmable Custom Computing Machines (FCCM), 2018 IEEE Annual International Symposium on, 2018
Recommended citation: Abhishek Jain, Scott Lloyd, Maya Gokhale, "Microscope on memory: MPSoC-enabled computer memory system assessments." In the proceedings of Field-Programmable Custom Computing Machines (FCCM), 2018 IEEE Annual International Symposium on, 2018. (http://abhishekkumarjain.github.io/files/FCCM2018.pdf)
Performance Assessment of Emerging Memories Through FPGA Emulation
Published in IEEE Micro, 2018
Recommended citation: Abhishek Jain, Scott Lloyd, Maya Gokhale, "Performance Assessment of Emerging Memories Through FPGA Emulation." IEEE Micro, 2018. (https://www.osti.gov/pages/servlets/purl/1734593)
A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs
Published in In the proceedings of 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020
Recommended citation: Abhishek Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde, "A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs." In the proceedings of 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020. (https://people.ece.ubc.ca/hosseino/publications/SpMV_FPL2020_published.pdf)
High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay
Published in In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020
Recommended citation: Xiangwei Li, Kizheppatt Vipin, Douglas Maskell, Suhaib Fahmy, Abhishek Jain, "High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay." In the proceedings of 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020. (http://wrap.warwick.ac.uk/132228/7/WRAP-high-throughput-accelerator-framework-linear-Fahmy-2020.pdf)
Role of on-chip networks in building domain-specific architectures (DSAs) for sparse computations
Published in In the proceedings of Proceedings of the Workshop on System-Level Interconnect: Problems and Pathfinding Workshop, 2020
Recommended citation: Abhishek Jain, "Role of on-chip networks in building domain-specific architectures (DSAs) for sparse computations." In the proceedings of Proceedings of the Workshop on System-Level Interconnect: Problems and Pathfinding Workshop, 2020. (https://www.youtube.com/watch?v=CrWcchvFJVM&t=19313s)
Coarse Grained FPGA Overlay for Rapid Just-In-Time Accelerator Compilation
Published in IEEE Transactions on Parallel and Distributed Systems, 2021
Recommended citation: Abhishek Jain, Douglas Maskell, Suhaib Fahmy, "Coarse Grained FPGA Overlay for Rapid Just-In-Time Accelerator Compilation." IEEE Transactions on Parallel and Distributed Systems, 2021. (https://accl.kaust.edu.sa/papers/2022-tpds-jain.pdf)
Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform
Published in In the proceedings of 2021 IEEE High Performance Extreme Computing Conference (HPEC), 2021
Recommended citation: Abhishek Jain, Sharan Kumar, Aashish Tripathi, Dinesh Gaitonde, "Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform." In the proceedings of 2021 IEEE High Performance Extreme Computing Conference (HPEC), 2021. (https://ieeexplore.ieee.org/abstract/document/9622804/)
The Evolution of Domain-Specific Computing for Deep Learning
Published in IEEE Circuits and Systems Magazine, 2021
Recommended citation: Stephen Neuendorffer, Alireza Khodamoradi, Kristof Denolf, Abhishek Jain, Samuel Bayliss, "The Evolution of Domain-Specific Computing for Deep Learning." IEEE Circuits and Systems Magazine, 2021. (https://www.semanticscholar.org/paper/The-Evolution-of-Domain-Specific-Computing-for-Deep-Neuendorffer-Khodamoradi/4133952aaaa326147d477a003343804b62a35236)
talks
Talk 1 on Relevant Topic in Your Field
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Conference Proceeding talk 3 on Relevant Topic in Your Field
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This is a description of your conference proceedings talk, note the different field in type. You can put anything in this field.
teaching
Teaching experience 1
Undergraduate course, University 1, Department, 2014
This is a description of a teaching experience. You can use markdown like any other post.
Teaching experience 2
Workshop, University 1, Department, 2015
This is a description of a teaching experience. You can use markdown like any other post.